1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same.
2. Related Art
In MOS transistors, an increase in leakage current between a gate and a substrate resulting from direct tunneling of carriers through an insulating film is an issue. As a method for avoiding such tunneling, formation of a gate insulating film using a material having a relative dielectric constant significantly higher than that of SiO2 has been proposed. Specific examples of such a gate insulating film include metal oxide films made of high-dielectric constant metal oxides such as ZrO2 and HfO2 and metal oxide films made of compounds of such high-dielectric constant metal oxides and SiO2, i.e., so-called silicates. Further, silicates containing nitrogen can maintain an amorphous state even at 1,000° C., and have a high relative dielectric constant of about 20. In addition, the diffusion coefficient of an impurity such as boron in such N-containing silicate films is small. For these reasons, N-containing silicate films are expected to be applied to a CMOS process requiring heat resistance.
However, in a case where a gate electrode made of polycrystalline silicon and a gate insulating film made of a metal oxide such as HfO2 or ZrO2 are used together, a threshold voltage fluctuates. The degree of fluctuation is very large, and therefore it is difficult to control a threshold voltage by a conventional method, that is, by adjusting the impurity concentration of a substrate portion. Further, it has been confirmed that such a phenomenon can occur not only when pure semiconductor gate electrodes of, for example, Si or Ge are used, but also when semiconductor gate electrodes of metal silicides or metal germanides are used.
In order to solve such a problem, a method for suppressing fluctuations in threshold voltage has been proposed (see, for example, Japanese Patent Laid-open Publication No. 2002-280461). According to this method, an additive element having a valence higher than that of a metal constituting a high-dielectric constant film by one is added to an N-MIS transistor and an additive element having a valence lower than that of a metal constituting a high-dielectric constant film by one is added to a P-MIS transistor so that charge states thereof are different from each other, thereby suppressing fluctuations in threshold voltage.
However, addition of different additive elements to the N-MIS transistor and the P-MIS transistor complicates a manufacturing process, thereby increasing manufacturing costs as a whole.
Further, in order to achieve a low threshold voltage, it is necessary to add a high concentration (10 atomic %) of additive element. When the concentration of the additive element is high, it is impossible to neglect the characteristics of the additive element itself. For example, excessive addition of the additive element leads to a decrease in dielectric constant. Further, excessive addition of the additive element allows a large number of fixed charges to exist in the insulating film so that electrons or holes as transistor carriers are scattered by the fixed charges existing in the insulating film, thus resulting in decrease in electron mobility or hole mobility. As described above, introduction of a high concentration of additive element into a gate insulating film made of a metal oxide leads to a decrease in dielectric constant and a decrease in electron mobility or hole mobility, thereby causing a problem that device characteristics are deteriorated.